Optimization-Based Methodology to Design the MMC's Sub-Module Capacitors

This paper proposes an optimization-based size reduction methodology for Modular Multilevel Converters (MMC), focusing on minimizing the converter's sub-module capacitor $C_{SM}$ . The analysis is performed considering both current and voltage limitations Transmission System Operator (TSO) Fault Ride Through (FRT) requirements. By means of a steady-state analysis, time-domain expressions arms energies are obtained their behavior throughout MMC's operating range shown. Based these expressions, problem to reduce developed its constraints imposed ensure that levels within design limitations. suggested method compared with different approaches distinct active reactive power set-points, where it shown SM can be reduced up 24% in comparison worst performance 7% regarding best used purposes. Furthermore, simulations MMC several AC sags order demonstrate dynamics arm applied voltages acceptable margins during operations.